Application Note 241 Working with High Impedance Op Amps

New developments have dramatically reduced the error currents of IC op amps, especially at high temperatures. The basic techniques used to obtain this peformance are briefly described. Some of the problems associated with working at the high impedance levels that take advantage of these low error currents are discussed along with their solutions. The areas involved are printed-circuit board leakage, cable leakage and noise generation, semiconductor-switch leakages, large-value resistors and capacitor limitations. INTRODUCTION A new, low cost op amp reduces dc error terms to where the amplifier may no longer be the limiting factor in many practical circuits. FET bias currents are equalled at room temperature; but unlike FETs, the bias current is relatively stable even over a −55 ̊C to 125 ̊C temperature range. Offset voltage and drift are low because bipolar inputs and on-wafer trimming are used. The 100 μV offset voltage and 25 pA bias current are expected to advance the state of the art for high impedance sensors and signal conditioners.